Patent · US Active

Clock-synchronized method for universal serial bus (USB)

US8553753B2 · kind B2 · utility

4Cited by
1References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 10, 2010
Grant dateOct 8, 2013
Priority date
Expiry dateOct 7, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2025/03783
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A clock-synchronized method for universal serial bus (USB) is described. The method includes the following steps of: (a) a transmitter sends a periodic signal to a host unit during a first time interval; (b) the host unit transmits a first equalization training sequence signal to a receiver during a second time interval to train the receiver and the transmitter continuously sends the periodic signal to the host unit; (c) a clock and data recovery device extracts the first equalization training sequence signal during the second time interval to generate a extracted clock signal and a data signal; and (d) the transmitter sends a second equalization training sequence signal to the host unit based on the extracted clock signal during the third time interval to train the host unit and the receiver and the transmitter commonly utilize the extracted clock signal as a reference clock.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.