Method and system for memory protection by processor carrier based access control
US8555013B1 · kind B1 · utility
4Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2005 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Nov 15, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for memory protection in a multiprocessor system, involving receiving a request at a first carrier to perform a memory operation at a memory address, wherein the first carrier receives the request from a processor, determining by the first carrier whether the processor is permitted to access memory at the memory address using a carrier identification (ID) of a second carrier, wherein the second carrier is associated with a memory controller used to access the memory, and sending the request to the second carrier, if the processor is permitted to access the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.