Patent · US Active

Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture

US8555037B2 · kind B2 · utility

407Cited by
21References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 24, 2012
Grant dateOct 8, 2013
Priority date
Expiry dateSep 24, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3842
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of a system and a method in which a processor may execute instructions that cause the processor to receive an input vector and a control vector are disclosed. The executed instructions may also cause the processor to perform a minima or maxima operation on another input vector dependent upon the input vector and the control vector.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.