Semiconductor device and a method of manufacturing the same
US8558391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2012 |
| Grant date | Oct 15, 2013 |
| Priority date | — |
| Expiry date | Sep 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1306
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having redistribution interconnects in the WPP technology and improved reliability, wherein the redistribution interconnects have first patterns and second patterns which are electrically separated from each other within the plane of the semiconductor substrate, the first patterns electrically coupled to the multi-layer interconnects and the floating second patterns are coexistent within the plane of the semiconductor substrate, and the occupation ratio of the total of the first patterns and the second patterns within the plane of the semiconductor substrate, that is, the occupation ratio of the redistribution interconnects is 35 to 60%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.