Nonvolatile memory device and related method of operation
US8559225B2 · kind B2 · utility
8Cited by
2References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 3, 2012 |
| Grant date | Oct 15, 2013 |
| Priority date | — |
| Expiry date | Oct 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory device comprises alternately arranged odd and even memory cells. The odd and even memory cells are connected to corresponding odd and even bitlines, which are connected to corresponding odd and even page buffers. In a read operation of the flash memory device, data is sensed at two different times via the odd and even bitlines. In certain embodiments, data is read from the odd page buffers while data is being sensed via the even bit lines, or vice versa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.