Patent · US Active

Repurposing NAND ready/busy pin as completion interrupt

US8560764B2 · kind B2 · utility

6Cited by

3References

11Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Amber D. Huffman · Banks, US
Suryaprasad Kareenahalli · Folsom, US
Robert J. Rover, Jr. · Portland, US
Chai Huat Gan · Bukit Mertajam, MY

Key dates

Filing date	Dec 21, 2009
Grant date	Oct 15, 2013
Priority date	—
Expiry date	Mar 31, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/32
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.