Patent · US Active

Compiler for generating an executable comprising instructions for a plurality of different instruction sets

US8561037B2 · kind B2 · utility

75Cited by
77References
37Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 29, 2007
Grant dateOct 15, 2013
Priority date
Expiry dateAug 9, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F8/447
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A software compiler is provided that is operable for generating an executable that comprises instructions for a plurality of different instruction sets as may be employed by different processors in a multi-processor system. The compiler may generate an executable that includes a first portion of instructions to be processed by a first instruction set (such as a first instruction set of a first processor in a multi-processor system) and a second portion of instructions to be processed by a second instruction set (such as a second instruction set of a second processor in a multi-processor system). Such executable may be generated for execution on a multi-processor system that comprises at least one host processor, which may comprise a fixed instruction set, such as the well-known x86 instruction set, and at least one co-processor, which comprises dynamically reconfigurable logic that enables the co-processor's instruction set to be dynamically reconfigured.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.