Patent · US Active

Method for manufacturing semiconductor device

US8563393B2 · kind B2 · utility

3Cited by
1References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 25, 2011
Grant dateOct 22, 2013
Priority date
Expiry dateApr 19, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/256
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a semiconductor device which prevents damage to alignment marks used for alignment between a superjunction structure and process layers at subsequent steps. In the related art, recesses are made in a semiconductor substrate before the formation of the superjunction structure and used as alignment marks and in order to prevent damage to the alignment marks, the alignment marks are covered by an insulating film such as a silicon oxide film during the subsequent process of forming the superjunction structure, but the inventors have found that damage may penetrate the cover film, reach the semiconductor substrate and destroy the marks. In the method according to the invention, alignment marks for alignment between the superjunction structure and process layers at subsequent steps are formed after the formation of the superjunction structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.