Semiconductor device
US8563973B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Nov 22, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.