Digital signal filter
US8565709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Dec 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H7/1758
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A passive filter circuit filters an input signal to attenuate an undesired frequency. The passive filter circuit includes a first stage and a second stage. The input to the first stage is the input signal. The first stage includes a first inductor and a first branch coupled to the output of the first inductor. The first branch includes a first capacitor and a second inductor. The first stage is coupled to the second stage. The second stage includes a third inductor and a second branch coupled to the output of the third inductor. The second branch includes a second capacitor. Other embodiments are also described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.