Decimal floating point multiplier and design structure
US8566385B2 · kind B2 · utility
0Cited by
8References
18Claims
0Family size
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Key dates
| Filing date | Dec 2, 2009 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Aug 21, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/4911
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Several implementations and a design structure for decimal multiplication that uses a BCD 4221 encoding scheme, separate accumulation of partial products, accumulation of the partial products into a final product and conversion from and to a BCD 8421 coding scheme.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.