Distributed trace using central performance counter memory
US8566484B2 · kind B2 · utility
2Cited by
10References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 21, 2012 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Aug 21, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.