Low overhead space management for large caches
US8566534B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Apr 20, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0895
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, to manage an address space for large caches are described. In some implementations, a method includes receiving data to be cached in a cache address space associated with a cache memory. The cache address space includes two or more designated portions of the cache address space, such that each of the two or more designated portions has an associated minimum amount of data allowed to be cached therein. Additionally, the respective minimum amounts of the two or more designated portions are different from each other. The method also includes selecting a cache address for caching the received data from one of the two or more designated portions of the cache address space that has an associated minimum amount of data allowed to be cached therein being less than the received data. Further, the method includes caching the received data at the selected cache address, and accessing at least a subset of the data cached at the selected cache address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.