Memory system and method for generating and transferring parity information
US8566669B2 · kind B2 · utility
11Cited by
2References
14Claims
0Family size
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Key dates
| Filing date | Jul 7, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Feb 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system and method for generating and transferring parity information within burst transactions of burst read and write transfers and without dedicated parity chips or parity data lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.