Method of fabricating semiconductor device
US8569140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Apr 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device is disclosed. One embodiment of the method includes forming a dummy gate pattern on a substrate, forming an interlayer dielectric film that covers the dummy gate pattern, exposing a top surface of the dummy gate pattern, selectively removing the dummy gate pattern to form a first gate trench, forming a sacrificial layer pattern over a top surface of the substrate in the first gate trench, the sacrificial layer pattern leaving a top portion of the first gate trench exposed, increasing an upper width of the exposed top portion of the first gate trench to form a second gate trench, and removing the sacrificial layer pattern in the second gate trench, and forming a non-dummy gate pattern in the second gate trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.