Circuitry for clock and method for providing clock signal
US8570087B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Jan 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0997
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provide a clock circuit and a method for providing a clock signal. The clock circuit includes: an adaptive clock generation circuit, configured to output an adaptive clock signal; and an adaptive clock driven circuit, configured to be driven by the adaptive clock signal to work. A maximum workable frequency of the adaptive clock driven circuit is higher than or equal to a frequency of the adaptive clock signal. When a working condition of the adaptive clock driven circuit is changed, the maximum workable frequency of the adaptive clock driven circuit is changed, the frequency of the adaptive clock signal which is output by the adaptive clock generation circuit is changed, and a changing direction of the frequency of an adaptive clock signal is consistent with that of the maximum workable frequency. The clock circuit and method may be used in design or manufacturing of a digital circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.