Scalable error detection and cross-session timing synchronization for packet-switched transmission
US8570869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2008 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Jun 17, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/008
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems, methods and computer program codes are provided to facilitate error detection and timing synchronization of scalable data transmissions. To this end, checksum error detection is applied to the core layer and enhancement layers of the scalable payload data in such a way that dropping one or several enhancement layers from the payload data does not change the value of the checksum. Only one checksum is transmitted, e.g., in the payload or in the header of the lower-layer protocol. The transmitter modifies the encoded bit stream in such a manner that the entity in the network deploying the scalable payload and removing layers from the packet does not need to recalculate the checksum placed in the payload or packet header, even when the payload size is changed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.