Data de-duplication and solid state memory device
US8572312B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Dec 7, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | May 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example methods and apparatus concern identifying placement and/or erasure data for a flash memory based solid state device that supports de-duplication. One example apparatus include a processor, a memory, a set of logics and an interface to connect the processor, the memory, and the set of logics. The apparatus may include an SSD placement logic configured to determine placement data for a de-duplication data set. The placement data may be based on forensic data acquired for the de-duplication data set. The apparatus may also include a write logic configured to write at least a portion of the de-duplication data set to an SSD as controlled by the placement data. The forensic data may identify, for example, the order in which sub-blocks are accessed, reference counts, access frequency, access groups, and other access information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.