Methods and apparatus providing high-speed content addressable memory (CAM) search-invalidates
US8572313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Mar 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.