Security and safety manager implementation in a multi-core processor
US8572404B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Dec 27, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/575
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a multi-core computer processor. One or more cores of the multi-core computer processor are configured as a security co-processor for the system and for other cores of the multi-core processor, and one or more cores of the multi-core computer processor are configured as a safety manager co-processor for the system and for other cores of the multi-core processor. An operating system of the security co-processor and an operating system of the safety manager co-processor are independent of operating systems of the other cores of the multi-core processor. The security co-processor and the safety manager co-processor are configured to boot before the other cores and to enforce security policy and/or safety policy on the other cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.