Integrated circuit protected against horizontal side channel analysis
US8572406B2 · kind B2 · utility
1Cited by
0References
18Claims
0Family size
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Key dates
| Filing date | Mar 31, 2010 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Nov 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including a multiplication function configured to execute a multiplication operation of two binary words x and y including a plurality of basic multiplication steps of components xi of word x by components yj of word y is described. The multiplication function of the integrated circuit is configured to execute two successive multiplications by modifying, in a random or pseudo-random manner, an order in which the basic multiplication steps of components xi by components yj are executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.