Outer code protection for solid state memory devices
US8572457B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2010 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Feb 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Outer code words can span multiple data blocks, multiple die, or multiple chips of a memory device to protect against errors in the data stored in the blocks, die and/or chips. A solid state memory device is arranged in multiple data blocks, each block including an array of memory cells arranged in a plurality of pages. The data is encoded into inner code words and symbol-based outer code words. The inner code words and the symbol-based outer code words are stored in the memory cells of the multiple blocks. One or more inner code words are stored in each page of each block and one or more symbols of each outer code word are stored in at least one page of each block. The inner code words and the outer code words are read from the memory device and are used to correct the errors in the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.