Deactivating parallel MOSFETs to improve light load efficiency
US8575902B1 · kind B1 · utility
6Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2008 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | May 29, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Circuits, methods, and apparatus that reduce the power required to drive transistors in switching power supply regulators under various load conditions. One example provides a power supply regulator having multiple parallel transistors in order to reduce series on resistance. When the regulator is lightly loaded, a reduced number of devices are driven by the regulator. That is, one or more devices are not driven, rather their gates are held at a voltage such that the devices remain in the off or non-conductive state. When the regulator is more heavily loaded, more or all of the devices are driven.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.