Patent · US Active

Method and system for implementing a scalable, high-performance, fault-tolerant locking mechanism in a multi-process environment

US8578218B2 · kind B2 · utility

2Cited by
26References
43Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 4, 2009
Grant dateNov 5, 2013
Priority date
Expiry dateMay 28, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/0793
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Described is an improved method, system, and computer program product for preventing concurrent access and processing of data by multiple threads. The inventive approach may be applied to prevent concurrent access in resequencers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.