Patent · US Active

LDPC encoding and decoding of packets of variable sizes

US8578249B2 · kind B2 · utility

23Cited by

7References

42Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Aamod Khandekar · San Diego, US
Thomas Richardson · South Orange, US

Key dates

Filing date	Mar 6, 2012
Grant date	Nov 5, 2013
Priority date	—
Expiry date	Mar 6, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH04L1/1812
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Techniques to support low density parity check (LDPC) encoding and decoding are described. An apparatus includes at least one processor and a memory coupled to the at least one processor. The at least one processor is configured to encode or decode a packet based on a base parity check matrix and a set of lifting values. In a particular embodiment, the set of lifting values is limited to lifting values that are each a different power of two. The memory is configured to store parameters associated with the base parity check matrix.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.