Inductors with through VIAS
US8580647B2 · kind B2 · utility
6Cited by
34References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2011 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Dec 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A device using an inductor with one or more through vias, and a method of manufacture is provided. In an embodiment, an inductor is formed in one or more of the metallization layers. One or more through vias are positioned directly below the inductor. The through vias may extend through one or more dielectric layers interposed between a substrate and the inductors. Additionally, the through vias may extend completely or partially through the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.