Nonvolatile semiconductor memory device and method of manufacturing same
US8581323B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2010 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Aug 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A memory string is formed to surround the side surface of a columnar portion and a charge storing layer, and includes plural first conductive layers functioning as gates of memory transistors, and a first protecting layer stacked to protect an upper portion of the plural first conductive layers. The plural first conductive layers constitute a first stairway portion formed stepwise such that their ends are located at different positions. Each first conductive layer constitutes a step of the first stairway portion. A top surface of a first portion of the first stairway portion is covered with the first protecting layer including a first number of layers, and A tope surface of a second portion of the first stairway portion located at a lower level than the first portion is covered with the first protecting layer including a second number of layers fewer than the first number of layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.