Signal-characteristic determined digital-to-analog converter (DAC) filter stage configuration
US8581756B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2012 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Sep 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/504
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital signal processing circuit, such as a digital-to-analog converter (DAC) having multiple cascaded processing stages, some of which are selectably placed in a low-power non-operating state according to a lower-power operating mode of the digital signal processing circuit and are placed in an operating state according to another higher-performance operating mode of the circuit. The output sample rates of the stages differ, so that the sample rate through the cascade changes. A signal characteristic determination block generates an indication of one or both of an amplitude and/or frequency of the input signal, so that the operating mode of the digital signal processing circuit is selected in conformity with the indication of amplitude and/or frequency of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.