Method for fabricating a contact grid array
US8584353B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 2, 2006 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Jun 23, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for producing scalable, low cost, reliable, compliant, low profile, low insertion force, high-density, separable and reconnectable interposer for high speed, high performance electronic circuitry and semiconductors. The method can be used to make, for example, electrical connections from components such as a Printed Circuit Board (PCB) to another PCB, MPU, NPU, or other semiconductor device. A normalized working range for an array of elastic contacts of the interposer can be about 0.2 to 1.0. A reversible normalized working range is maintained through multiple connections and reconnections using a highly elastic material for the contact arms. In one aspect, a first electrical component having a first array pitch can be connected to a second electrical component having a second array pitch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.