Systems and methods providing spur avoidance in a direct conversion tuner architecture
US8586461B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2009 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | May 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/4382
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.