Reconfigurable logic block, programmable logic device provided with the reconfigurable logic block, and method of fabricating the reconfigurable logic block
US8587336B2 · kind B2 · utility
4Cited by
7References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2006 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Jun 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reconfigurable logic block has a first circuit that configures an arithmetic circuit and a second circuit that configures a circuit outside of the arithmetic circuit. A plurality of different circuits are configured by changing the settings of predetermined signals in the first and second circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.