Multilayer capacitor, manufacturing method thereof, circuit board, and electronic device
US8587924B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2010 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Oct 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/232
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided is a multilayer capacitor that can be manufactured with high yields and whose warpage is suppressed. The multilayer capacitor includes two or more laminated bodies which are bonded together, the two or more laminated bodies each including resin layers and metal layers which are alternately laminated a plurality of times in a thickness direction and each being warped and having front and rear surfaces covered with surface layers containing a resin material, one of the front and rear surfaces being formed of a first surface as a smooth surface having no recess portion, another of the front and rear surfaces being formed of a second surface having a recess portion, in which at least two adjacent laminated bodies are bonded together at the first surfaces or the second surfaces. Also provided are a manufacturing method for the multilayer capacitor, and a circuit board and an electronic device which use the multilayer capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.