System and method for reducing power consumption in a content-addressable memory
US8587979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2011 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Jul 31, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one disclosed embodiment, a content-addressable memory (CAM) system configured for reduced power consumption includes a sensing circuit utilized to apply a sense voltage to a matchline of the CAM system, a valid bit cell coupled to the matchline, and a power cut-off circuit configured to isolate the sense voltage from the matchline when an invalid validity state is stored in the valid bit cell, thereby reducing power consumption by the CAM system. In one embodiment, the power cut-off circuit isolates the sense voltage from the matchline by decoupling the sensing circuit from a control signal when an invalid validity state is stored in the valid bit cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.