Methods and apparatuses to reduce context switching during data transmission and reception in a multi-processor device
US8588253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2009 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Nov 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for efficiently transferring data between a first and second processors having shared memory. A plurality of data packets are aggregated into a packet bundle at the first processor. The packet bundle is then transferred from the first processor to the second processor using the shared memory, wherein the transfer of the packet bundle is performed in a single context switch at the first processor. The packet bundle is then unbundled into individual data packets at the second processor, wherein a processing load of the second processor is reduced due to the aggregation of the data packets into the packet bundle by the first processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.