Automatic parity checking identification
US8589841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2012 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Apr 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus and computer program product for automatic parity check identification. The method comprising: automatically identifying a parity signal in a circuit design, wherein the parity signal is defined as a parity function of a set of support signals, wherein the automatic identification comprises: obtaining a candidate parity signal and a corresponding set of candidate support signals; and verifying that a bit flip in exactly one of any of the corresponding candidate set of support signals induces a bit flip on a value of the candidate parity signal; wherein said method further comprises reporting the automatically identified parity signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.