Nonvolatile semiconductor memory device and manufacturing method thereof
US8592789B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Mar 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/82
Abstract
In a nonvolatile semiconductor memory device, there is provided a technique which promotes microfabrication by reducing a thickness of the device as suppressing an OFF current of a polysilicon diode which is a selective element. A polysilicon layer to which an impurity is doped at low concentration and which becomes an electric-field relaxation layer of the polysilicon diode which is a selective element of a resistance variable memory is formed so as to be divided into two or more layers such as polysilicon layers. In this manner, it is suppressed to form the crystal grain boundaries thoroughly penetrating between an n-type polysilicon layer and a p-type polysilicon layer in the electric-field relaxation layer, and therefore, it is prevented to generate a leakage current flowing through the crystal grain boundaries in application of a reverse-bias voltage without increasing a height of the polysilicon diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.