Apparatus and method for protection of electronic circuits operating under high stress conditions
US8592860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Jul 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
Abstract
Apparatus and methods for electronic circuit protection under high stress operating conditions are provided. In one embodiment, an apparatus includes a substrate having a first p-well, a second p-well adjacent the first p-well, and an n-type region separating the first and second p-wells. An n-type active area is over the first p-well and a p-type active area is over the second p-well. The n-type and p-type active areas are electrically connected to a cathode and anode of a high reverse blocking voltage (HRBV) device, respectively. The n-type active area, the first p-well and the n-type region operate as an NPN bipolar transistor and the second p-well, the n-type region, and the first p-well operate as a PNP bipolar transistor. The NPN bipolar transistor defines a relatively low forward trigger voltage of the HRBV device and the PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.