Solid state imaging device
US8592874B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Nov 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/186
Abstract
In each of pixels 10 arranged in an array pattern, an insulating isolation part 22 electrically isolates adjacent photoelectric conversion elements 11, and the photoelectric conversion element 11 and an amplifier transistor 14. The insulating isolation part 22 constitutes a first region A between the photoelectric conversion elements 11 where the amplifier transistor 14 is not arranged, and a second region B between the photoelectric conversion elements 11 where the amplifier transistor 14 is arranged. A low concentration first isolation diffusion layer 23 is formed below the insulating isolation part 22 constituting the first region A, and a high concentration second isolation diffusion layer 24 and a low concentration first isolation diffusion layer 23 are formed below the insulating isolation part 22 constituting the second region B. A source/drain region of the amplifier transistor 14 in the second region B is formed in a well region 25 formed simultaneously with the second isolation diffusion layer 24.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.