Semiconductor device having shield layer and chip-side power supply terminal capacitively coupled therein
US8592957B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 9, 2010 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Jun 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device including a wiring board having a first surface on which a board-side ground terminal and a board-side power supply terminal are provided; a semiconductor chip arranged so as to face the first surface of the wiring board, where the first surface faces an opposite surface of the semiconductor chip; a shield layer provided at the semiconductor chip so as to cover an outer surface of the semiconductor chip except for the opposite surface; a chip-side power supply terminal which is provided on the opposite surface and is electrically connected to the board-side power supply terminal; a chip-side ground terminal which is provided on the opposite surface and is electrically connected to the board-side ground terminal and the shield layer; and a first capacitively coupled part by which the shield layer and the chip-side power supply terminal are capacitively coupled with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.