Semiconductor device, fabricating method thereof and semiconductor package including the semiconductor device
US8592991B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Apr 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.