Memory management for high speed media access control
US8594112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2012 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Mar 20, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W88/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Aspects disclosed herein address the need in the art for memory management for high speed media access control. A packet buffer may store packets with a first data structure, comprising the packet length, sequence number, and a pointer to a second data structure. Packet data may be stored in a linked list of one or more second data structures. Transmit and receive queues may be formed using linked lists or arrays of the first data structures. Memory locations for storing first and second data structures may be kept in lists indicating free locations for the respective data structure types. A flexible memory architecture is disclosed in which two configurations may be selected. Various other aspects are also presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.