Patent · US Active

Sampling clock selection module of serial data stream

US8594263B2 · kind B2 · utility

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8Claims
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Assignee

Inventors

Key dates

Filing dateApr 17, 2012
Grant dateNov 26, 2013
Priority date
Expiry dateApr 17, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/046
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A sampling clock selection module for a serial data stream is disclosed. The sampling clock selection module includes a multi-phase generation circuit, a sampling circuit, a comparison unit and a logic operation unit. The multi-phase generation circuit generates a plurality of non-overlapping clock phases derived from a reference clock signal. The phase selection circuit selects a sampling clock phase under a calibration mode. The sampling circuit performs sampling on the serial data stream a plurality of times to generate a plurality of sampled values in response to the sampling clock phase. The comparison unit compares the sampled values with the serial data stream so as to update a plurality of flag signals. The logic operation unit performs a logic operation on the flag signals so as to select a sampling clock phase under a normal operation mode from the clock phases.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.