Rate verification of an incoming serial alignment sequence
US8595536B2 · kind B2 · utility
0Cited by
9References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Oct 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0262
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A technique for rate verification of an incoming serial alignment sequence includes receiving an incoming serial stream. A determination is then made as to whether an align sequence is recognized in the incoming serial stream. When an align sequence is recognized, a check is made to determine if an appropriate number of align primitives are received during a predetermined number of clock periods. If the number of received align primitives matches the predetermined number, then a rate-verified align detect signal is asserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.