Methods, systems, and articles of manufacture for implementing a physical design of an electronic circuit with automatic snapping
US8595662B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2012 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Apr 12, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are methods and systems for providing a constraint-driven environment for implementing a physical design of an electronic circuit with automatic snapping. In some embodiments, the method identifies or creates an incomplete layout. The method identifies an object and constraints for the object. The method then identifies an approximate position for the object in the layout and automatically snaps the object to a drop location based on the approximate position while complying with relevant constraint(s). The method may further align an object with another object with some spacing in between in some embodiments. The method may also perform automatic layer-to-layer snapping between two sets of objects such as cell instances, each having at least one object on multiple layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.