Three-dimensional semiconductor memory devices
US8598647B2 · kind B2 · utility
4Cited by
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14Claims
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Key dates
| Filing date | Nov 8, 2011 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | May 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
Provided are three-dimensional semiconductor devices. The device includes conductive patterns stacked on a substrate, and an active pattern penetrating the conductive patterns to be connected to the substrate. The active pattern includes a first doped region disposed adjacent to at least one of the conductive patterns, and a diffusion-resistant doped region overlapped with at least a portion of the first doped region. The diffusion-resistant doped region may be a region doped with carbon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.