Single finger gate transistor
US8598659B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2005 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Jul 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
A transistor device includes a lightly doped layer of semiconductor material of a first type and a body region of semiconductor material of a second type. A source region of the first type is formed in the body region, the source region being more doped than the lightly doped layer. A drain region of the first type is formed in the lightly doped layer, the drain region being more doped than the lightly doped layer. A drift region of the lightly doped layer is further provided disposed between the body region and the drain region. Additionally, a gate electrode is provided surrounding the drain region. The gate electrode is partially disposed over a thin oxide and partially over a thick oxide, wherein the gate electrode extended over the thick oxide from the thin oxide controls the electric field in the drift region to increase the avalanche breakdown of the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.