Semiconductor device
US8598688B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2011 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Jan 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/142
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and manufacturing method are disclosed which prevent breakage and chipping of a semiconductor chip and improve device characteristics. A separation layer is in a side surface of an element end portion of the chip. An eave portion is formed by a depressed portion in the element end portion. A collector layer on the rear surface of the chip extends to a side wall and bottom surface of the depressed portion, and is connected to the separation layer. A collector electrode is over the whole surface of the collector layer, and is on the side wall of the depressed portion. The thickness of an outermost electrode film is 0.05 μm or less. The collector electrode on the rear surface of the chip is joined onto an insulating substrate via a solder layer, which covers the collector electrode on a flat portion of the rear surface of the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.