Digital signal processor (DSP) architecture for a hybrid television tuner
US8599312B2 · kind B2 · utility
3Cited by
19References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2009 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Dec 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.