ESD protection on high impedance MIC input
US8599525B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2011 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Jan 5, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49117
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus comprises an integrated circuit (IC) including an external IC connection, a high impedance circuit, a biasing circuit communicatively coupled to the external IC connection via the high impedance circuit, and an electro-static discharge (ESD) protection circuit coupled to the biasing circuit to form a circuit shunt path leading from the IC external connection to the ESD protection circuit via the high impedance circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.