Circuits and methods for measuring circuit elements in an integrated circuit device
US8599623B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2011 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | May 1, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device can include a plurality of test elements, each comprising at least one first switch coupled between a node within a tested section and an intermediate node, a test switch coupled between the intermediate node and a forced voltage node, and a second switch coupled between the intermediate node and an output node; wherein the forced voltage node is coupled to receive a forced voltage substantially the same as a test voltage applied to the output node in a test mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.